Question about protection function of PAC5523 ASPD
I have plan to use PAC5523 in my motor controller design.
I would like to know which protections are implemented for integrated gate drivers(high-side and low side)
- Under voltage of high-side and low-side driver?
- Overcurrent protection for external mosfet
I tried to find information at datasheet and user manual, I couldn’t find it.
Hi Hak-Jin Jeong,
Under Voltage Protection for the gate drive is treated under the VP regulator. If VP collapses, then a fault is issued. You can also trigger an interrupt based on whether there is an under voltage condition at VP. Please refer to section 6.6.4 PWRSET on the PAC5523 Users Guide for details on how to use the bits VPLOW and nVPINTM for this purpose.
With regards to over current protection, this is handled by taking advantage of the three differential amplifiers at AIO10/32/54. I recommend you study the sample projects (either BEMF or FOC) to see how these features are enabled and configured. It is also detailed within section 7 (Configurable Analog Front-End) and the registers AIO0 through AIO6.
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