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PAC5232 – Questions for embedded gate driver (ASPD)

Ask an EngineerCategory: Intelligent Motor ControlPAC5232 – Questions for embedded gate driver (ASPD)
Ng Ka Lung asked 6 months ago

Dear Sir,
We are planned to use PAC5232 in our project. We would like to get more information regarding the protection provided by the
gate driver (ASPD) embedded inside this CUP. My questions are written below.
(1) In section 12 of PAC5232 datasheet, we would like to know the detail of Make Before Break MBB circuit.
(2) From figure 12.1, what faults can be detected by the block called FAULT PROTECT & CURRENT LIMIT.
(3) Using L6390 gate driver manufactured by ST as example, UV detection and shoot through prevention is implemented in this IC. How can we implement these two function in PAC5232?
(4) Table 12.1 states that PAC5232 can sink and source 2A current. We would like to know the testing condition in order to get this current capability ? Is it continuous 2A or pulsed 2A current?

Thanks with best regards
Barry Ng
Senior Engineer.

1 Answers
Jose Quinones answered 6 months ago

Hi Barry Ng,
To answer your questions:

  1. Please refer to section 24.1.3 of the PAC5232 Users Guide. It details the enablement and functioning of this block. In essence, it ensures both high and low side FETs are not enabled at the same time, in the event the dead time is too small.
  2. Please refer to section 23 of the PAC5232 Users Guide which details the Configurable Analog Front End. In there you will see how to configure the differential amplifiers to handle over current events and protect you from hazardous current levels. It also details how to configure the Cycle By Cycle Current Limit mode, which can be used to regulate current by specifying a limit with the LPDAC resource.
  3. All PAC5XXX devices take advantage of an integrated dead time generator. Please refer to section 12 of the PAC5232 Users Guide which details the TIMERA operation. In there you will see how you can enable the dead time generator to add delays for both rise and falling edges, in order to ensure there is no shoot through. This resource is fully programmable. For Under Voltage, we have different faults and checks for the regulators. This would be covered under the Configurable Power Manager, Section 22.
  4. All of our PAC5xxx integrated gate drives assume a pulse condition as required to turn the power stage’s FETs ON and OFF. It is not recommended to apply this current continuously as the power dissipation within the package would be too large.

Hope the info helps! Please let us know if there is anything else we can help you with.